LogicFab
 
 
 
  SERVICES    
 
 
   
 
 
SYSTEM DESIGN
   
DESIGN DEVELOPMENT SERVICES
    Specification Development
    Architecture Analysis / Benchmarking
    RTL Development
DESIGN VERIFICATION SERVICES
    Architecture Level Verification
    Module Level Verification
    Chip Level Verification
    System Level Verfication
    Post Level Verification
    FPGA Prototyping and Validation
    Mixed Signal Simulation
VERIFICATION IP DEVELOPMENT
VERIPORTAL
SYSTEM LAB
DESIGN INTEGRATION SERVICES
    Design Integration
    Synthesis
    Chip Level Verification
    Timing Closure
    Design for Testability
    Floor Planning
    Die Planning
    Physical Verification
 
   
   
FPGA SERVICES
    Product Definition and Architecture
    Development
    FPGA Design
    FPGA verification and Analysis
    ASIC Prototyping on FPGA
    Migration Services
    FPGA board bring-up and System Validation
    Enhancement services
EMBEDDED SOFTWARE
FULL CUSTOM SOLUTIONS
    Analog and Mixed Signal Design
    Logic Standard Cell Libraries
    Interface Libraries
    Memory Compilers and Custom Design
    Layout (Mask) Design and Verification
Accelerating simulations with TLM models
    Processor Modelling
    Peripheral Simulation
    Instruction Set Simulation
    Testbench evaluation
    Virtual Platform Development
    SystemC/TLM 2.0 VP

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